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 To all our customers
Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp. Customer Support Dept. April 1, 2003
Cautions
Keep safety first in your circuit designs! 1. Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corporation or a third party. 2. Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corporation by various means, including the Renesas Technology Corporation Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.
HM62W8512BI Series
4 M SRAM (512-kword x 8-bit)
ADE-203-1086A (Z) Rev. 1.0 Jul. 13, 1999 Description
The Hitachi HM62W8512BI is a 4-Mbit static RAM organized 512-kword x 8-bit. HM62W8512BI Series has realized higher density, higher performance and low power consumption by employing Hi-CMOS process technology. The HM62W8512BI Series offers low power standby power dissipation; therefore, it is suitable for battery backup systems. It is packaged in standard 32-pin TSOP II.
Features
* Single 3.3 V supply: 3.3 V 0.3V * Access time: 70/85 ns (max) * Power dissipation Active: 16.5 mW/MHz (typ) Standby: 3.3 W (typ) * Completely static memory. No clock or timing strobe required * Equal access and cycle times * Common data input and output: Three state output * Directly LV-TTL compatible: All inputs and outputs * Battery backup operation * Operating temperature: -40 to +85C
Ordering Information
Type No. HM62W8512BLTTI-7 HM62W8512BLTTI-8 Access time 70 ns 85 ns Package 400-mil 32-pin plastic TSOP II (TTP-32D)
HM62W8512BI Series
Pin Arrangement
32-pin TSOPII (Normal Type TSOP)
A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view)
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A15 A17 WE A13 A8 A9 A11 OE A10 CS I/O7 I/O6 I/O5 I/O4 I/O3
Pin Description
Pin name A0 to A18 I/O0 to I/O7 CS OE WE VCC VSS Function Address input Data input/output Chip select Output enable Write enable Power supply Ground
2
HM62W8512BI Series
Block Diagram
V CC V SS
* * * * *
A18 A16 A1 A0 A2 A12 A14 A3 A7 A6 Row Decoder Memory Matrix 1,024 x 4,096
I/O0 Input Data Control I/O7
* *
Column I/O Column Decoder
* *
A10 A4 A5 A13 A17A15A8 A9 A11
* *
CS WE OE
Timing Pulse Generator Read/Write Control
3
HM62W8512BI Series
Function Table
WE x H H L L CS H L L L L OE x H L H L Mode Not selected Output disable Read Write Write VCC current I SB , I SB1 I CC I CC I CC I CC Dout pin High-Z High-Z Dout Din Din Ref. cycle -- -- Read cycle Write cycle (1) Write cycle (2)
Note: x: H or L
Absolute Maximum Ratings
Parameter Power supply voltage Voltage on any pin relative to V SS Power dissipation Operating temperature Storage temperature Storage temperature under bias Symbol VCC VT PT Topr Tstg Tbias Value -0.5 to +4.6 -0.5* to V CC + 0.5* 1.0 -40 to +85 -55 to +125 -40 to +85
1 2
Unit V V W C C C
Notes: 1. -3.0 V for pulse half-width 30 ns 2. Maximum voltage is 4.6 V
Recommended DC Operating Conditions (Ta = -40 to +85C)
Parameter Supply voltage Symbol VCC VSS Input high voltage Input low voltage Note: VIH VIL Min 3.0 0 2.4 -0.3
*1
Typ 3.3 0 -- --
Max 3.6 0 VCC + 0.3 0.6
Unit V V V V
1. -3.0 V for pulse half-width 30 ns
4
HM62W8512BI Series
DC Characteristics (Ta = -40 to +85C, VCC = 3.3 V 0.3 V, VSS = 0 V)
Parameter Input leakage current Output leakage current Operating power supply current: DC Operating power supply current Symbol |ILI| |ILO | I CC I CC1 Min -- -- -- -- Typ*1 -- -- -- -- Max 1 1 10 45 Unit Test conditions A A mA mA Vin = VSS to V CC CS = VIH or OE = VIH or WE = VIL, VI/O = VSS to V CC CS = VIL, others = VIH/VIL, I I/O = 0 mA Min cycle, duty = 100% CS = VIL, others = VIH/VIL I I/O = 0 mA Cycle time = 1 s, duty = 100% I I/O = 0 mA, CS 0.2 V VIH V CC - 0.2 V, VIL 0.2 V CS = VIH Vin 0 V, CS V CC - 0.2 V I OL = 2.0 mA I OL = 100 A I OH = -100 A I OH = -2.0 mA
Operating power supply current
I CC2
--
5
10
mA
Standby power supply current: DC Standby power supply current (1): DC Output low voltage
I SB I SB1 VOL
-- -- -- --
0.1 1* 2 -- --
0.3 40* 2 0.4 0.2 -- --
mA A V V V V
Output high voltage
VOH
VCC - 0.2 -- 2.4 --
Note:
1. Typical values are at VCC = 3.3 V, Ta = +25C and specified loading, and not guaranteed. 2. This characteristics is guaranteed only for L-version.
Capacitance (Ta = +25C, f = 1 MHz)
Parameter Input capacitance*
1 1
Symbol Cin CI/O
Typ -- --
Max 8 10
Unit pF pF
Test conditions Vin = 0 V VI/O = 0 V
Input/output capacitance* Note:
1. This parameter is sampled and not 100% tested.
5
HM62W8512BI Series
AC Characteristics (Ta = -40 to +85C, VCC = 3.3 V 0.3 V, unless otherwise noted.)
Test Conditions * * * * * Input pulse levels: 0.4 V to 2.4 V Input rise and fall time: 5 ns Input timing reference levels: 1.4 V Output timing reference level: 0.8 V/2.0 V Output load (Including scope & jig)
500 Dout 50 pF 1.4 V
Read Cycle
HM62W8512BI -7 Parameter Read cycle time Address access time Chip select access time Output enable to output valid Chip selection to output in low-Z Output enable to output in low-Z Chip deselection to output in high-Z Output disable to output in high-Z Output hold from address change Symbol t RC t AA t CO t OE t LZ t OLZ t HZ t OHZ t OH Min 70 -- -- -- 10 5 0 0 10 Max -- 70 70 35 -- -- 30 30 -- -8 Min 85 -- -- -- 10 5 0 0 10 Max -- 85 85 45 -- -- 35 35 -- Unit ns ns ns ns ns ns ns ns ns 2 2 1, 2 1, 2 Notes
6
HM62W8512BI Series
Write Cycle
HM62W8512BI -7 Parameter Write cycle time Chip selection to end of write Address setup time Address valid to end of write Write pulse width Write recovery time WE to output in high-Z Data to write time overlap Data hold from write time Output active from output in high-Z Output disable to output in high-Z Symbol t WC t CW t AS t AW t WP t WR t WHZ t DW t DH t OW t OHZ Min 70 60 0 60 50 0 0 30 0 5 0 Max -- -- -- -- -- -- 30 -- -- -- 30 -8 Min 85 75 0 75 55 0 0 35 0 5 0 Max -- -- -- -- -- -- 35 -- -- -- 35 Unit ns ns ns ns ns ns ns ns ns ns ns 2 1, 2, 7 3, 12 6 1, 2, 7 4 5 Notes
Notes: 1. t HZ , t OHZ and t WHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referred to output voltage levels. 2. This parameter is sampled and not 100% tested. 3. A write occurs during the overlap (tWP) of a low CS and a low WE. A write begins at the later transition of CS going low or WE going low. A write ends at the earlier transition of CS going high or WE going high. tWP is measured from the beginning of write to the end of write. 4. t CW is measured from CS going low to the end of write. 5. t AS is measured from the address valid to the beginning of write. 6. t WR is measured from the earlier of WE or CS going high to the end of write cycle. 7. During this period, I/O pins are in the output state so that the input signals of the opposite phase to the outputs must not be applied. 8. If the CS low transition occurs simultaneously with the WE low transition or after the WE transition, the output remain in a high impedance state. 9. Dout is the same phase of the write data of this write cycle. 10. Dout is the read data of next address. 11. If CS is low during this period, I/O pins are in the output state. Therefore, the input signals of the opposite phase to the outputs must not be applied to them. 12. In the write cycle with OE low fixed, tWP must satisfy the following equation to avoid a problem of data bus contention. t WP tDW min + tWHZ max
7
HM62W8512BI Series
Timing Waveforms
Read Timing Waveform (WE = VIH)
tRC
Address tAA tCO CS tLZ tOE tOLZ OE tOHZ tHZ
Dout
Valid Data tOH
8
HM62W8512BI Series
Write Timing Waveform (1) (OE Clock)
tWC Address tAW OE tCW CS
*8
tWR
tAS WE tOHZ Dout
tWP
tDW Din Valid Data
tDH
9
HM62W8512BI Series
Write Timing Waveform (2) (OE Low Fixed)
tWC Address tCW CS
*8
tWR
tAW tWP
WE
tAS tWHZ tOW
tOH
*9
*10
Dout tDW Din tDH
*11
Valid Data
10
HM62W8512BI Series
Low VCC Data Retention Characteristics (Ta = -40 to +85C)
Parameter VCC for data retention Data retention current Chip deselect to data retention time Operation recovery time Symbol VDR I CCDR t CDR tR Min 2 -- 0 t RC*
4
Typ -- 0.8* -- --
3
Max -- 20* -- --
1
Unit V A ns ns
Test conditions*2 CS V CC - 0.2 V, Vin 0 V VCC = 3.0 V, Vin 0 V CS V CC - 0.2 V See retention waveform
Notes: 1. For L-version and 10 A (max.) at Ta = -40 to +40C. 2. CS controls address buffer, WE buffer, OE buffer, and Din buffer. In data retention mode, Vin levels (address, WE, OE, I/O) can be in the high impedance state. 3. Typical values are at VCC = 3.0 V, Ta = +25C and specified loading, and not guaranteed. 4. t RC = read cycle time.
Low V CC Data Retention Timing Waveform (CS Controlled)
tCDR VCC 3.0 V Data retention mode tR
2.4 V VDR CS 0V CS VCC - 0.2 V
11
HM62W8512BI Series
Package Dimensions
HM62W8512BLTTI Series (TTP-32D)
Unit: mm
20.95 21.35 Max 32 17
1 *0.42 0.08 0.40 0.06 1.15 Max
1.27 0.21
M
16
10.16
0.80 11.76 0.20 0 - 5 0.50 0.10
0.10
*0.17 0.05 0.125 0.04
0.13 0.05
1.20 Max
*Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
TTP-32D Conforms -- 0.51 g
12
HM62W8512BI Series
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223
Copyright (c) Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
13


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